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Keyword: Dual-rail
Improvement of the Natural Self-Timed Circuit Tolerance to Short-Term Soft Errors
The paper discusses the features of the implementation and functioning of digital self-timed circuits. They have a naturally high tolerance to short-term single soft errors caused by various factors, such as nuclear particles, radiation, and others. Combinational self-timed circuits using dual-rail coding of signals are naturally immune to 91% of typical soft errors classified in…
Read More Synthesis of QDI Combinational Circuits using Null Convention Logic Based on Basic Gates
Currently, synchronous digital circuits (SDC) may require certain design conditions, such as power consumption, robustness, performance, etc. These design conditions are more difficult to satisfy when SDC are implemented in VLSI (Very Large Scale Integration) technology and in the deep-sub-micron MOS (DSM-MOS) technology. The asynchronous design style has properties that serve as an alternative to…
Read More Mealy-to-Moore Transformation – A state stable design of automata
The paper shows a method of transforming an asynchronously feedbacked Mealy machine into a Moore machine. The transformation is done in dual-rail logic under the use of the RS-buffer. The transformed machine stabilizes itself and is safe to use. The transformation is visualized via KV-diagrams and calculated with formulas. We will present three use-cases for…
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