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Author/Affiliation: Saroja V Siddamal
Design and Implementation of DFT Technique to Verify LBIST at RTL Level
According to IEC 61805 and ISO 26262 standards requirement inclusion of LBIST (Logic Built in Self-Test) became mandatory to achieve safety critical application such as automotive field. In such systems, once device is switched ON LBIST (Logic Built in Self-Test) is activated and testing of digital logic is performed. After safety subsystem says that the…
Read More VLSI Architecture for OMP to Reconstruct Compressive Sensing Image
A real-time embedded system requires plenty of measurements to fallow the Nyquist criteria. The hardware built for such a large number of measurements, is facing the challenges like storage and transmission rate. Practically it is very much complex to build such costly hardware. Compressive Sensing (CS) will be a future alternate technique for the Nyquist…
Read More Design and Implementation of Quad-Site Testing on FPGA Platform
As manufacturing efficiency has become a main focus of today’s business, it is very critical to surge the throughput by developing different test strategies. With throughput, testing cost also has been recognized as the major challenge in the future of leading semiconductors. Reducing test time is a significant effort to maximize throughput as the complexity…
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