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Author/Affiliation: Pierre CanetImpact of Line Resistance Combined with Device Variability on Resistive RAM Memories
Advances in Science, Technology and Engineering Systems Journal,
Volume 3,
Issue 1,
Page # 11–17,
2018;
DOI: 10.25046/aj030102
Abstract:
In this paper, the performance and reliability of oxide-based Resistive RAM (ReRAM) memory is investigated in a 28nm FDSOI technology versus interconnects resistivity combined with device variability. Indeed, common problems with ReRAM are related to high variability in operating conditions and low yield. At a cell level ReRAMs suffer from variability. At an array level,…
Read More(This article belongs to the SP4 (Special issue on Advancement in Engineering Technology 2017-18) & Section Electronic Engineering (EEE))
