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Keyword: Asynchronous logicOpen AccessArticle
10 Pages, 2,262 KB 
Synthesis of QDI Combinational Circuits using Null Convention Logic Based on Basic Gates
Abstract:
Currently, synchronous digital circuits (SDC) may require certain design conditions, such as power consumption, robustness, performance, etc. These design conditions are more difficult to satisfy when SDC are implemented in VLSI (Very Large Scale Integration) technology and in the deep-sub-micron MOS (DSM-MOS) technology. The asynchronous design style has properties that serve as an alternative to…
Read More(This article belongs to the Special Issue on Multidisciplinary Sciences and Engineering 2018 & Section Electronic Engineering (EEE))