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Keyword: Chip-to-chip communications
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Open AccessArticle
10 Pages, 2,241 KB Download PDF

A Simple Modelling Tool for Fast Combined Simulation of Interconnections, Inter-Symbol Interference and Equalization in High-Speed Serial Interfaces for Chip-to-Chip Communications

Advances in Science, Technology and Engineering Systems Journal, Volume 5, Issue 2, Page # 527–536, 2020; DOI: 10.25046/aj050266
Abstract:

We describe an efficient system-level simulator that, starting from the architecture of a well-specified transmissive medium (a channel modelled as single-ended or coupled differential microstrips plus cables) and including the system-level characteristics of transmitter and receiver (voltage swing, impedance, etc.), computes the eye diagram and the bit-error rate that is obtained in high-speed serial interfaces.…

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(This article belongs to the Special Issue on Multidisciplinary Sciences and Engineering 2019-20 & Section Electronic Engineering (EEE))

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