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The article suggests four circuit topologies for the practical simulation of grounded and floating lossy inductors. All the suggested circuits use commercially available integrated circuit LT1228 chips as active elements, and only two passive elements, namely one resistor and one capacitor. The first two of the proposed circuits employ only a single LT1228 active element…

This article proposes a compact and simple design of electronically adjustable voltage-mode biquadratic filter using fundamental active cell implemented on a single integrated circuit (IC) package as LT1228. The proposed circuit having triple inputs and single output (TISO) employs namely one resistor and two capacitors as the passive components. All the five possible biquadratic filtering…

Through-Silicon-Vias (TSVs) are utilized for high density 3D integration, which induce crosstalk problems and impact signal integrity. This paper focuses on TSV crosstalk characterization in 3D integrated circuits, where several TSV physical and environmental configurations are investigated. In particular, this work shows a detailed study on the influence of signal-ground TSV locations, distances and their…

Analog layout is created in integrated circuits (IC) computer aided design (CAD) environment and during realization requires a lot of modifications of database objects. Because database objects modification is time consuming, then any improvement and simplification of modification flow in IC CAD environment can increase layout productivity. A proposed new modification concept can speed-up layout…

Metal Oxide Semiconductor Field-Effect Transistors are commonly taught in courses for electrical engineers as they are the most common components within integrated circuits. However, despite numerous papers and books on MOSFETs, students still struggle with understanding their behaviour, particularly in the saturation region. This paper presents an expanded explanation of MOSFET behaviour, with a consistent…

As manufacturing efficiency has become a main focus of today’s business, it is very critical to surge the throughput by developing different test strategies. With throughput, testing cost also has been recognized as the major challenge in the future of leading semiconductors. Reducing test time is a significant effort to maximize throughput as the complexity…

This review paper discusses recent research outcomes of fabricating three-dimensional (3D) heterogeneous structures in complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) technologies to enable smart future chips. The CMOS-based 3D heterogeneous structures demonstrated are vertical magnetic-cored inductors for radio-frequency (RF) ICs, through-back-end-of-line (BEOL) metal wall structures for global flying noise isolation, above-IC nano crossbar array electrostatic…

In advanced technologies nodes, starting from 28 nm to 7 nm and below, the power consumed of integrated circuits (ICs) becomes a big concern. Consequently, actual electronic design automation (EDA) tools are facing many challenges to have low power, reduced area and keep having required performance. To reach required success criteria, and because each picosecond…

Multicore processor combines two or more independent cores onto one integrated circuit. Although it offers a good performance in terms of the execution time, there are still many metrics such as number of cores, power, memory and more that effect on multicore performance and reduce it. This paper gives an overview about the evolution of…

This paper, presents the design of a temperature sensor based on RO (Ring Oscillator) in order to make a thermal study for the detection and localization of thermal peaks in a complex system. In this work, a simulation and FPGA implementation of a fully digital temperature sensor features a number of exact inverters that can…

A company’s ability to find the most profitable technology is based on a precise forecast of achievement potential. Technology Management (TM) uses forecasting models to analyse future potentials, e.g. the Gartner Hype Cycle, Arthur D. Little’s technology lifecycle or McKinsey’s S-curve model. All these methods are useful for qualitative analysis in the planning of strategic…

With silicon technology further scaling, the switching activities together with GHz operation frequency greatly affects the power integrity by generating large IR-drop noises. Excessive IR-drop causes functional failures such as timing failure, abnormal reset and SRAM flipping. The PGN needs to be optimized to reduce IR-drop. The traditional EDA optimization routine repeats the steps such…