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We address irregular polygon nesting on sheet materials with a lightweight evolutionary framework that operates directly in the layout space. The method formalizes multi-term fitness combining utilization, overlap penalties, spacing regularity, and local alignment, with all components normalized before aggregation. Feasibility is enforced by an AABB– SAT pipeline and validated via analytic ground-truth cases, degenerate…

This investigation demonstrates the analysis of various layout arrangements for oscillator (OSC) realized by CMOS technologies. Moreover, the analysis reveals that the serpentine style of OSC stages attains the minimum output variation on silicon. This investigation is firstly verified by post-layout simulations, comparing the variation with different kinds of layout arrangement for OSC designs, including…

The development of wind farms requires an optimal design of wind turbines layout. The main goal of this optimization is to minimize the wake effect through the optimal placement of the wind turbines. The current study aims to standardize the wake losses among all wind turbines in the wind farm and bringing their losses to…

This study introduces the implementation of fuzzy set theory to solve machine layout design issues, in order to handle vague information, using a genetic algorithm with tournament selection as the selection operator. The material handling inputs, including frequency and volume of materials that move between machines, were the parameters regarded as fuzzy numbers. The experimental…

Analog layout is created in integrated circuits (IC) computer aided design (CAD) environment and during realization requires a lot of modifications of database objects. Because database objects modification is time consuming, then any improvement and simplification of modification flow in IC CAD environment can increase layout productivity. A proposed new modification concept can speed-up layout…

Gate driver has been applied in many ways, exemplified by that, by using the DC-isolated and AC-pass characteristics of gate driver’s primary and secondary sides, the problem of floating endpoint in semiconductor power switch can be solved. However, the conventional design of isolated gate driver provides circuit voltage blocking by optically coupled components. Due to…

Discrete component based ultra-wideband SPDT switch modelling, design and implementation challenges are reported in this article. The basic SPDT switch is planned to design using PIN diodes (bare die). Nonlinear parameters extraction steps of PIN diode from datasheets have been proposed in this article instead of using readymade nonlinear PIN diode models. Equalizers are designed…

Ultra-high resolution broadcasting such as 4K and 8K are becoming more popular for at-home use. The position of the viewer’s mean gaze point when they are looking at a larger display depends on the video clip, viewing position, and viewing distance. The International Telecommunication Union provided the document BT-2022; as the standard viewing conditions for…

This paper uses the RC-triggered MOSFET-based electrostatic discharge (ESD) power clamp to conduct ESD from ESD events and not affect the ultra-low power sensor system. Then using the stacked device include stacked MOSFET or stacked BJT to reduce the leakage current which increases with temperature. Moreover, we compare gate-driven method and two-level–driven with both gate-driven…

The paper discusses the features of the implementation and functioning of digital self-timed circuits. They have a naturally high tolerance to short-term single soft errors caused by various factors, such as nuclear particles, radiation, and others. Combinational self-timed circuits using dual-rail coding of signals are naturally immune to 91% of typical soft errors classified in…

In this paper, a multiple-objective Metaheuristics study is discussed. Initially, three mono-objective metaheuristics will be explored in order to design and optimize Radio-Frequency integrated inductors. These metaheuristics are: An evolutionary algorithm called The Differential Evolution (DE), An algorithm supported on Newton’s laws of gravity and motion called the Gravitational Search Algorithm (GSA) and, finally, A…

With silicon technology further scaling, the switching activities together with GHz operation frequency greatly affects the power integrity by generating large IR-drop noises. Excessive IR-drop causes functional failures such as timing failure, abnormal reset and SRAM flipping. The PGN needs to be optimized to reduce IR-drop. The traditional EDA optimization routine repeats the steps such…