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Keyword: PLL
Discretisation of Second Order Generalized Integrator to Design the Control Algorithm of Unified Power Quality Conditioner
In this paper, second order generalized integrator (SOGI) is discretized to design the control algorithm of unified power quality conditioner (UPQC). A UPQC is combination two voltage source converter (VSC) and VSC are connected with back to back DC link. The first one VSC is in series to maintain the desire voltage at point of…
Read More Phase-Adjusted Microwave Oscillators Based on a Discriminator
At the conference “System timing, shaping and signal processing” “SYNCHRONO-2020” there was report: “Simulation of steady state microwave oscillator with dielectric resonator” and “Microwave generators, driven by voltage-based microassemblies with dielectric resonators”. An algorithm for calculating a generator with an open dielectric resonator is described. Based on the DesignLab 8.0 simulation environment, the analysis of…
Read More Stability and nonlinear controller design of Fast-Lock Phase-Locked Loop in 0.18-µm CMOS
This paper introduces a kind of novel backstepping phase- locked loops (PLL). The paper presents a developed theoretical model of (PLL) frequency synthesizer and provides analytical equations for calculating the desired specification such as phase margin (PM). The proposed model aims to improve the control accuracy, ensure stability and reducing the lock time. Adaptive controller…
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