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This investigation demonstrates the analysis of various layout arrangements for oscillator (OSC) realized by CMOS technologies. Moreover, the analysis reveals that the serpentine style of OSC stages attains the minimum output variation on silicon. This investigation is firstly verified by post-layout simulations, comparing the variation with different kinds of layout arrangement for OSC designs, including…

A novel PVTL (Process, Voltage, Temperature, Leakage) detection circuit consisting of four individual detectors is proposed in the investigation. Voltage Variation Detector is composed of a feedback control block comprising multi-stage delay cells using high Vth devices such that 0.5% of VDD variation can be detected. Temperature Detector based on a current to pulse converter…

In this paper, a novel approach to design a Process Design Kit Digital for CMOS 180nm process is presented. This work proposes a detailed flow to design a PDK Digital using Ocean language, which is a vital element in the semi-custom design and applied in education purposes in universities in Vietnam. The PDK digital includes…

In this article, a new method to extract the RLC parameters from the structure of a Rotating Traveling Wave Oscillator (RTWO) is described. The use of a 3D simulator (EMPRO) allow us to develop a precise analysis of the impact of the topology, the geometrical discontinuities, and the dimensions of the transmission lines, on the…

This paper introduces a kind of novel backstepping phase- locked loops (PLL). The paper presents a developed theoretical model of (PLL) frequency synthesizer and provides analytical equations for calculating the desired specification such as phase margin (PM). The proposed model aims to improve the control accuracy, ensure stability and reducing the lock time. Adaptive controller…

This paper presents a full wave active rectifier for biomedical implanted devices using a new comparator in order to reduce the rectifier transistors reverse current. The rectifier was designed in 0.13μm CMOS process and it can deliver 1.2Vdc for a minimum signal of 1.3Vac. It achieves a power conversion efficiency of 92% at the 13.56MHz…

Gate driver has been applied in many ways, exemplified by that, by using the DC-isolated and AC-pass characteristics of gate driver’s primary and secondary sides, the problem of floating endpoint in semiconductor power switch can be solved. However, the conventional design of isolated gate driver provides circuit voltage blocking by optically coupled components. Due to…

The design of microelectronic systems is often complex, therefore metaheuristics can be of a great interest, because in most cases these systems have conflicting objectives and constraints. In this paper, we demonstrate the application of multi-criteria design strategies to a CMOS current conveyor. This provides designers with the ability to develop solutions that can meet…

In this work, a study of the process variation effects on the threshold voltage of a floating- gate device is proposed. The study demonstrates the sensitivity of the threshold voltage to five geometrical parameters including gate length, gate width, tunneling gate oxide thickness, bottom oxide-nitride-oxide oxide thickness, and nitride spacer thickness. This paper also proposed…

This paper presents a low voltage, low power, fast settling switched capacitor based Proportional to Absolute Temperature (PTAT) current reference circuit. Unlike in a conventional resistor based PTAT current source, the proposed circuit saves a significant amount of silicon area on chip and hence the circuit becomes less susceptible to process variations. It creates a…

Obstructive Sleep Apnea (OSA) is a potentially common sleep disorder manifested in upper airways’ collapse, either partially or completely. If diagnosed late and untreated, it may result in serious complications. The standard golden method, useful for treating OSA, remains the full night Continuous Positive Airway Pressure (CPAP). Yet, due to the ensuing discomfort it incurs…

Low power OTAs are the most preferred circuits in the realization of continuous time filters of analog front end of wearable healthcare devices. A low transconductance OTA with series parallel current mirror to realize large time constant of the filter is designed. The differential pair of the OTA uses bulk driven PMOSFETs and the subthreshold…

This review paper discusses recent research outcomes of fabricating three-dimensional (3D) heterogeneous structures in complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) technologies to enable smart future chips. The CMOS-based 3D heterogeneous structures demonstrated are vertical magnetic-cored inductors for radio-frequency (RF) ICs, through-back-end-of-line (BEOL) metal wall structures for global flying noise isolation, above-IC nano crossbar array electrostatic…

A switched capacitor low-pass filter employing folded-cascode CMOS OP Amps with a dynamic switching bias circuit capable of processing video signals, which enables low power consumption, and operation in wide bandwidths and low power supply voltages, is proposed. In this filter, charge transfer operations through two-phase clock pulses during the on-state period of the OP…

Radiation hardened devices are mostly extremely expensive. The continuously downscaling of microelectronic structures and the unavoidable presence of particle radiation on ground and in space leads to unwanted failures in electronic devices. Furthermore it is expected that in the next few years around 8000 new satellites will be launched around the world. Due to the…

This paper presents on-chip testing structures to characterize and detect faulty Through Silicon Vias (TSVs) in 3D ICs technology. 3D Gunning Transceiver Logic (GTL) I/O testing is proposed to characterize the performance of 3D TSVs in high speed applications. The GTL testing circuit will fire different data patterns at different frequencies to characterize the transient…