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Keyword: TSVs
Impact of Crosstalk on Signal Integrity of TSVs in 3D Integrated Circuits
Through-Silicon-Vias (TSVs) are utilized for high density 3D integration, which induce crosstalk problems and impact signal integrity. This paper focuses on TSV crosstalk characterization in 3D integrated circuits, where several TSV physical and environmental configurations are investigated. In particular, this work shows a detailed study on the influence of signal-ground TSV locations, distances and their…
Read More On-Chip Testing Schemes of Through-Silicon-Vias (TSVs) in 3D Stacked ICs
This paper presents on-chip testing structures to characterize and detect faulty Through Silicon Vias (TSVs) in 3D ICs technology. 3D Gunning Transceiver Logic (GTL) I/O testing is proposed to characterize the performance of 3D TSVs in high speed applications. The GTL testing circuit will fire different data patterns at different frequencies to characterize the transient…
Read More S-Parameters Optimization in both Segmented and Unsegmented Insulated TSV upto 40GHz Frequency
Segmented and unsegmented 3D insulated copper through silicon vias (TSVs) of diameter 10 micro-meter, height 100 micro-meter and silicon of sizes 100 micro-meter by 100 micro-meter by 100 micro-meter are modeled using analysis system (ANSYS), equivalent circuit using advanced design system (ADS) at frequency ranges between 100MHz and 40GHz and 10MHz step size. The segmented…
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